An Embedded Accelerator for Real World Computing

This paper presents a new general purpose accelerator based on the Kress ALU Array III (KrAA-III) — a novel field programmable ALU array (FPAA), which efficiently supports high performance arithmetic computations by massive pipelining. The KrAA-III and its underlying concepts will be introduced as a generalization of systolic array structural principles — illustrated by a simple real world computing example. To explain this approach for embedded accelerators the underlying novel machine paradigm, having been published earlier, is recalled as far as needed for comprehensibility.

[1]  Reiner W. Hartenstein,et al.  A general approach in system design integrating reconfigurable accelerators , 1996, 1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon.

[2]  Rainer Kress A fast reconfigurable ALU for Xputers , 1996 .

[3]  Jürgen Becker,et al.  A novel sequencer hardware for application specific computing , 1997, Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors.

[4]  Reiner W. Hartenstein,et al.  A General Purpose Xputer Architecture derived from DSP and Image Processing , 1994 .

[5]  Jürgen Becker,et al.  A two-level co-design framework for Xputer-based data-driven reconfigurable accelerators , 1997, Proceedings of the Thirtieth Hawaii International Conference on System Sciences.

[6]  André DeHon,et al.  Reconfigurable architectures for general-purpose computing , 1996 .

[7]  Jürgen Becker,et al.  An embedded accelerator for real-time image processing , 1996, Proceedings of the Eighth Euromicro Workshop on Real-Time Systems.

[8]  Jan M. Rabaey,et al.  A reconfigurable data-driven multiprocessor architecture for rapid prototyping of high throughput DSP algorithms , 1993, [1993] Proceedings of the Twenty-sixth Hawaii International Conference on System Sciences.