论文信息 - A 0.2 /spl mu/m 1.8 V SOI 550 MHz 64 b PowerPC microprocesser with copper interconnects

A 0.2 /spl mu/m 1.8 V SOI 550 MHz 64 b PowerPC microprocesser with copper interconnects

A 64 b PowerPC RISC microprocessor is incorporated in a 0.2 /spl mu/m CMOS technology with copper interconnects and multi-threshold transistors and next into a silicon-on-insulator (SOI) version of the same technology. Some architectural changes improve CPI, including doubling the L1 instruction and data caches to 128 kB and adding a 256 kB L2 directory. The total transistor count increased from 12 M to 34 M.

D.H. Allen | S.N. Storino | A.G. Aipperspach | D.T. Cox | N.V. Phan

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