Super thin-film transistor with SOI CMOS performance formed by a novel grain enhancement method

High performance super TFTs with different channel widths and lengths, formed by a novel grain enhancement method, are reported. High temperature annealing has been utilized to enhance the polysilicon grain and improve the quality of silicon crystal after low temperature MILC treatment on amorphous silicon. With device scaling, it is possible to fabricate the entire transistor on a single grain, thus giving the performance of single crystal SOI MOSFET. The effects of grain boundaries on device performance have been studied, indicating the existence of extra leakage current paths caused by the grain boundaries traversing the channel, which induced subthreshold hump and early punchthrough of wide devices. The probability for the channel region of a TFT to cover multiple grains decreases significantly when the device is scaled down, resulting in better device performance and higher uniformity.

[1]  M. Chan,et al.  Single grain thin-film-transistor (TFT) with SOI CMOS performance formed by metal-induced-lateral-crystallization , 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

[2]  D. J. Radack,et al.  Advanced Microelectronics: the role of SOI , 1999, 1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345).

[3]  P. Ko,et al.  SOI formation from amorphous silicon by metal-induced-lateral-crystallization (MILC) and subsequent high temperature annealing , 1999, 1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345).

[4]  V. Subramanian,et al.  Low-leakage germanium-seeded laterally-crystallized single-grain 100-nm TFTs for vertical integration applications , 1999, IEEE Electron Device Letters.

[5]  D. Ast,et al.  Kinetics of nickel-induced lateral crystallization of amorphous silicon thin-film transistors by rapid thermal and furnace anneals , 1999 .

[6]  H. Kwok,et al.  Effects of longitudinal grain boundaries on the performance of MILC-TFTs , 1999, IEEE Electron Device Letters.

[7]  M. Wong,et al.  The effects of extended heat treatment on Ni induced lateral crystallization of amorphous silicon thin films , 1999 .

[8]  S. Maeda,et al.  A C-switch cell for low-voltage and high-density SRAMs , 1998 .

[9]  Krishna C. Saraswat,et al.  High-performance germanium-seeded laterally crystallized TFTs for vertical device integration , 1998 .

[10]  James D. Plummer,et al.  A novel pillar DRAM cell for 4 Gbit and beyond , 1998, 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216).

[11]  K. Saraswat,et al.  Controlled two-step solid-phase crystallization for high-performance polysilicon TFT's , 1997, IEEE Electron Device Letters.

[12]  S. Maeda,et al.  High Performance Gate-all-around TFT(GAT) For High-density, Low-voltage-operation, And Low-power Srams , 1997, Proceedings of Technical Papers. International Symposium on VLSI Technology, Systems, and Applications.

[13]  K. Noda,et al.  A highly stable SRAM memory cell with top-gated P-N drain poly-Si TFTs for 1.5 V operation , 1996, International Electron Devices Meeting. Technical Digest.

[14]  Seung-Ki Joo,et al.  Low temperature poly-Si thin-film transistor fabrication by metal-induced lateral crystallization , 1996 .

[15]  Seung-Ki Joo,et al.  PD INDUCED LATERAL CRYSTALLIZATION OF AMORPHOUS SI THIN FILMS , 1995 .

[16]  Kikuo Ono,et al.  An LCD addressed by a-Si:H TFTs with peripheral poly-Si TFT circuits , 1993, Proceedings of IEEE International Electron Devices Meeting.

[17]  Takashi Noguchi,et al.  Appearance of Single-Crystalline Properties in Fine-Patterned Si Thin Film Transistors (TFTs) by Solid Phase Crystallization (SPC) , 1993 .

[18]  Tatsuo Uchida.  Present and future trend of electron device technology in flat panel display , 1991, International Electron Devices Meeting 1991 [Technical Digest].

[19]  Noriyoshi Yamauchi,et al.  Polysilicon thin-film transistors with channel length and width comparable to or smaller than the grain size of the thin film , 1991 .

[20]  Henry I. Smith,et al.  Grain growth and grain size distributions in thin germanium films , 1987 .

[21]  High-Performance Thin-Film Transistors in Low-Temperature Crystallized LPCVD Amorphous Silicon Films , 1987 .