Tunable work function in fully nickel-silicided polysilicon gates for metal gate MOSFET applications

The work function of fully nickel-silicided polysilicon was investigated. The midgap work function (4.7 eV) was obtained for undoped mononickel-silicide (NiSi). It was shown that the implantation of both arsenic and antimony into the polysilicon before silicidation reduces the NiSi work function, and the change in work function is greater for antimony than for arsenic. The pile-up of these species at the oxide interface during the nickel silicidation is demonstrated to be the physical mechanism responsible for the work function shift. Both species activations before silicidation and silicidation conditions were found to affect the NiSi work function shift significantly. The nonactivated species have minimum effect and incomplete silicidation can have maximum work function shift. The doping effect of indium on the NiSi work function is reported for the first time. A shift of /spl sim/0.14 eV toward the valence band was obtained for 2.6-nm oxide capacitors. It was found that the work function shift caused by the indium doping is saturated at a relatively low dose, which may be related to the low solid solubility of indium in polysilicon.

[1]  W. P. Maszara,et al.  Fully Silicided Metal Gates for High-Performance CMOS Technology: A Review , 2005 .

[2]  M.-R. Lin,et al.  Transistors with dual work function metal gates by single full silicidation (FUSI) of polysilicon gates , 2002, Digest. International Electron Devices Meeting,.

[3]  Ming Qin,et al.  Investigation of Polycrystalline Nickel Silicide Films as a Gate Material , 2001 .

[4]  D. Kwong,et al.  Dual work function metal gates using full nickel silicidation of doped poly-Si , 2003, IEEE Electron Device Letters.

[5]  Christophe Detavernier,et al.  Towards implementation of a nickel silicide process for CMOS technologies , 2003 .

[6]  S. Ahmed,et al.  Strained silicon NMOS with nickel-silicide metal gate , 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

[7]  S. Samavedam,et al.  Metal gates for advanced sub-80-nm SOI CMOS technology , 2001, 2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207).

[8]  Kok Wai Wong,et al.  Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation , 2002, Digest. International Electron Devices Meeting,.

[9]  M. Ieong,et al.  Threshold voltage control in NiSi-gated MOSFETs through silicidation induced impurity segregation (SIIS) , 2003, IEEE International Electron Devices Meeting 2003.