A novel self-aligned gate-overlapped LDD poly-Si TFT with high reliability and performance
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M. Hatano | M. Hatano | H. Akimoto | T. Sakai | H. Akimoto | T. Sakai
[1] I. Wu,et al. Physical models for degradation effects in polysilicon thin-film transistors , 1993 .
[2] Eiji Takeda,et al. Impact of the gate-drain overlapped device (GOLD) for deep submicrometer VLSI , 1988 .