Study of CCD Transport on CMOS Imaging Technology: Comparison Between SCCD and BCCD, and Ramp Effect on the CTI

This paper presents measurements performed on charge-coupled device (CCD) structures manufactured on a deep micrometer CMOS imaging technology, in surface channel CCD and in buried channel CCD mode. The charge transfer inefficiency is evaluated for both CCD modes with regard to the injected charge, and the influence of the rising and falling time effect is explored. Controlling the ramp and especially reducing its abruptness allows to get much lower charge transfer inefficiency in buried CCD mode. On the contrary, we did not observe any effect of the ramp on surface channel CCD mode because of the presence of interface traps at the silicon-oxide interface.

[1]  Michael F. Tompsett,et al.  The quantitative effects of interface states on the performance of charge coupled devices , 1971 .

[2]  M. Tompsett.  Surface potential equilibration method of setting charge in charge-coupled devices , 1975, IEEE Transactions on Electron Devices.

[3]  A. Tasch,et al.  Experimental characterization of transfer Efficiency in charge-coupled devices , 1975, IEEE Transactions on Electron Devices.

[4]  R. L. Nielsen,et al.  A 360 000-pixel charge-coupled color-image sensor for imaging photographic negative , 1985, IEEE Transactions on Electron Devices.

[5]  James R. Janesick,et al.  Effects of proton damage on charge-coupled devices , 1991, Medical Imaging.

[6]  J. P. Krusius,et al.  Characteristics of submicrometer gaps in buried-channel CCD structures , 1991 .

[7]  Edmund K. Banghart,et al.  A model for charge transfer in buried-channel charge-coupled devices at low temperature , 1991 .

[8]  M. J. Deen,et al.  Charge transfer efficiency in proton damaged CCD's , 1998 .

[9]  Edward S. Cheng,et al.  A comparison of charge transfer efficiency measurement techniques on proton damaged n-channel CCDs for the Hubble Space Telescope Wide-Field Camera 3 , 2001 .

[10]  Mingzhi Wei,et al.  Fully depleted, back-illuminated charge-coupled devices fabricated on high-resistivity silicon , 2003 .

[11]  Gordon R. Hopkinson,et al.  A guide to the use and calibration of detector array equipment , 2004 .

[12]  Tom Elliott,et al.  Fundamental performance differences between CMOS and CCD imagers: Part 1 , 2006, SPIE Astronomical Telescopes + Instrumentation.

[13]  A. Theuwissen,et al.  CMOS image sensors: State-of-the-art and future perspectives , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

[14]  B. LaMarr,et al.  CCD Charge Injection Structure at Very Small Signal Levels , 2008, IEEE Transactions on Electron Devices.

[15]  H.-S. Philip Wong,et al.  A Multi-Aperture Image Sensor With 0.7 $\mu{\hbox{m}}$ Pixels in 0.11 $\mu{\hbox{m}}$ CMOS Technology , 2008, IEEE Journal of Solid-State Circuits.

[16]  G. Meynants,et al.  Time-Delay-Integration Architectures in CMOS Image Sensors , 2009, IEEE Transactions on Electron Devices.

[17]  J. Johansson,et al.  Evaluation of a Surface-Channel CCD Manufactured in a Pinned Active-Pixel-Sensor CMOS Process , 2011, IEEE Transactions on Electron Devices.

[18]  James R. Janesick,et al.  Fundamental performance differences of CMOS and CCD imagers: part V , 2013, Electronic Imaging.