An Improved Chaos-Based Stream Cipher Algorithm and its VLSI Implementation

Recently, the growing numbers of cryptosystems based on chaos have been proposed; many of them have good statistical properties and security but low efficiency. To increase operating efficiency of cryptosystems, an improved chaos-based stream cipher algorithm based on discrete chaotic maps is presented. The algorithm improves the complexity of chaos by randomly changing chaotic control parameter. In the proposed algorithm, one logistic chaotic system generates the random changing parameter to control the parameter of the other. The algorithm only disturbs the control parameter of the chaotic system, so the chaotic character of the system itself has not been destroyed. To implement the algorithm, its VLSI architecture with low hardware cost and fast speed is designed, and the FPGA realization is given. Finally the algorithm is simulated to demonstrate the effectiveness of the proposed architecture.

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