论文信息 - Zero-power mismatch-independent digital to analog converter

Zero-power mismatch-independent digital to analog converter

Abstract A new switched-capacitor digital to analog converter (DAC) is presented. In this DAC, a ladder of series capacitors is used to generate the output voltage levels. A correction phase is used to increase the precision of the DAC. It is analytically shown that the proposed DAC is mismatch independent by virtue of the correction phase. That is after few correction phases (typically one), the effect of mismatch on the reference voltage levels on the ladder diminishes and an accurate voltage division is provided. It is proven that the whole process sinks no extra charge from the power supply. Furthermore, post layout simulations in 0.18 μm technology proves the benefits of the proposed method.

Ata Khorami | Mohammad Sharifkhani

[1] Zhangming Zhu,et al. V CM -based monotonic capacitor switching scheme for SAR ADC , 2013 .

[2] Soon-Jyh Chang,et al. A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure , 2010, IEEE Journal of Solid-State Circuits.

[3] Brian P. Ginsburg,et al. An energy-efficient charge recycling approach for a SAR converter with capacitive DAC , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[4] Harald Neubauer,et al. 12-bit hybrid C2C DAC based SAR ADC with floating voltage shield , 2009, 2009 3rd International Conference on Signals, Circuits and Systems (SCS).

[5] Mohammad Yavari,et al. Energy-efficient high-accuracy switching method for SAR ADCs , 2014 .

[6] Yvonne Y. H. Lam,et al. Low-energy and area-efficient tri-level switching scheme for SAR ADC , 2012 .

[7] Hoon-Ju Chung,et al. C-2C digital-to-analogue converter on insulator , 1999 .