Digital self-tuning technique for continuous-time filters

In this paper, a new auto-tuning digital technique is reported for continuous-time filters over VHF (very high frequency) applications, based on phase detector. By using a 0.35 mum mixed signal CMOS process, changes in frequency response of a 3rd-order low pass filter can be tuned with a 3% error over the designed value. This technique confirms the feasibility of the proposed scheme in continuous-time filter applications. The system consumes less area, power and tuning time than other proposed schemes. Simulated results show the building viability in a 10 MHz low pass filter.

[1]  R. Castello,et al.  An eighth-order CMOS lowpass filter with 30-120 Mhz tuning range and programmable boost , 2001, Proceedings of the 26th European Solid-State Circuits Conference.

[2]  R. Schaumann,et al.  Design of continuous-time fully integrated filters: a review , 1989 .

[3]  M. E. Valkenburg,et al.  Design of Analog Filters , 2001 .

[4]  Edgar Sanchez-Sinencio,et al.  A pseudo differential complex filter for Bluetooth with frequency tuning , 2003, IEEE Trans. Circuits Syst. II Express Briefs.

[5]  Qiuting Huang,et al.  A 71-MHz CMOS IF-baseband strip for GSM , 2000, IEEE Journal of Solid-State Circuits.

[6]  Yannis Tsividis,et al.  Integrated continuous-time filters : principles, design, and applications , 1993 .

[7]  John B. Hughes,et al.  Switched-currents : an analogue technique for digital technology , 1993 .

[8]  E.K.F. Lee,et al.  Design of low-voltage CMOS continuous-time filter with on-chip automatic tuning , 2001 .

[9]  R. Schaumann.  Continuous-Time Integrated Filters , 2001, Passive, Active, and Digital Filters.

[10]  Edgar Sanchez-Sinencio,et al.  Applications of Switched Capacitor Circuits , 1984 .

[11]  R. Castello,et al.  High-frequency analog filters in deep-submicron CMOS technology , 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).