Test generation based diagnosis of device parameters for analog circuits

With the increasing complexity of manufacturing processes and the shrinking of device geometries, the performance metrics of integrated circuits (ICs) are becoming increasingly sensitive to random fluctuations in the manufacturing process. We propose a diagnosis methodology that can be used to infer the cause(s) of variations in performance of analog ICs. The methodology consists of (a) a device parameter computation technique which is used to compute the device parameters of an IC from measurements made on it and (b) a cause-effect analysis module that is used to compute the cause of the variation in performance metrics of a given set of ICs. Simulation results to demonstrate the effectiveness of the technique are presented.

[1]  José Luis Huertas,et al.  Analog and mixed-signal benchmark circuits-first release , 1997, Proceedings International Test Conference 1997.

[2]  M. A. Styblinski,et al.  Parameter extraction for statistical IC modeling based on recursive inverse approximation , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  David E. Goldberg,et al.  Genetic Algorithms in Search Optimization and Machine Learning , 1988 .

[4]  Prashant Goteti,et al.  Hierarchy based statistical fault simulation of mixed-signal ICs , 1996, Proceedings International Test Conference 1996. Test and Design Validity.

[5]  Abhijit Chatterjee,et al.  Specification-driven test design for analog circuits , 1998, Proceedings 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Cat. No.98EX223).

[6]  Mani Soma,et al.  Dynamic test signal design for analog ICs , 1995, ICCAD.

[7]  Abhijit Chatterjee,et al.  Efficient test generation for transient testing of analog circuits using partial numerical simulation , 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).

[8]  Abhijit Chatterjee,et al.  Parametric fault diagnosis for analog systems using functional mapping , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[9]  E. Felt,et al.  Analog testability analysis and fault diagnosis using behavioral modeling , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[10]  Robert A. Pease,et al.  Troubleshooting Analog Circuits , 1991 .

[11]  Pramodchandran N. Variyam,et al.  Test generation for comprehensive testing of linear analog circuits using transient response sampling , 1997, ICCAD 1997.

[12]  J. Friedman.  Multivariate adaptive regression splines , 1990 .

[13]  G. Freeman,et al.  MERLIN: a device diagnosis system based on analytic models , 1993 .

[14]  Abhijit Chatterjee,et al.  Test generation for accurate prediction of analog specifications , 2000, Proceedings 18th IEEE VLSI Test Symposium.

[15]  S. Dowdy,et al.  Statistics for Research , 1983 .

[16]  Abhijit Chatterjee,et al.  Fault-based automatic test generator for linear analog circuits , 1993, ICCAD.

[17]  Kurt Antreich,et al.  Analog testing by characteristic observation inference , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[18]  Bozena Kaminska,et al.  Analog circuit testing based on sensitivity computation and new circuit modeling , 1993, Proceedings of IEEE International Test Conference - (ITC).

[19]  Abhijit Chatterjee,et al.  Minimal length diagnostic tests for analog circuits using test history , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[20]  Abhijit Chatterjee,et al.  Fault-based automatic test generator for linear analog circuits , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[21]  Abhijit Chatterjee,et al.  Hierarchical test generation for analog circuits using incremental test development , 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).

[22]  Jacob A. Abraham,et al.  A novel test generation approach for parametric faults in linear analog circuits , 1996, Proceedings of 14th VLSI Test Symposium.

[23]  Costas J. Spanos,et al.  Parameter Extraction for Statistical IC Process Characterization , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[24]  Abhijit Chatterjee,et al.  Partial simulation-driven ATPG for detection and diagnosis of faults in analog circuits , 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

[25]  David S. Watkins,et al.  Fundamentals of matrix computations , 1991 .

[26]  D. E. Goldberg,et al.  Genetic Algorithms in Search , 1989 .