Area optimization algorithms in high-speed digital FIR filter synthesis
暂无分享,去创建一个
[1] Lars Wanhammar,et al. ILP modelling of the common subexpression sharing problem , 2002, 9th International Conference on Electronics, Circuits and Systems.
[2] Taewhan Kim,et al. Circuit optimization using carry-save-adder cells , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[3] Patrick Schaumont,et al. A new algorithm for elimination of common subexpressions , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[4] Henrik Ohlsson,et al. Minimum-adder integer multipliers using carry-save adders , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).
[5] L. Aksoy,et al. Minimum number of operations under a general number representation for digital filter synthesis , 2007, 2007 18th European Conference on Circuit Theory and Design.
[6] R. Hartley. Subexpression sharing in filters using canonic signed digit multipliers , 1996 .
[7] A. Dempster,et al. Use of minimum-adder multiplier blocks in FIR digital filters , 1995 .
[8] Markus Püschel,et al. Multiplierless multiple constant multiplication , 2007, TALG.
[9] Paulo F. Flores,et al. An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..
[10] P. Barth. A Davis-Putnam based enumeration algorithm for linear pseudo-Boolean optimization , 1995 .
[11] Paolo Ienne,et al. Improved use of the carry-save representation for the synthesis of complex arithmetic circuits , 2004, ICCAD 2004.
[12] H. T. Nguyen,et al. Number-splitting with shift-and-add decomposition for power and hardware optimization in linear DSP synthesis , 2000, IEEE Trans. Very Large Scale Integr. Syst..
[13] K. Steiglitz,et al. Some complexity issues in digital signal processing , 1984 .
[14] H. Samueli,et al. Design techniques for silicon compiler implementations of high-speed FIR digital filters , 1996 .
[15] Paolo Ienne,et al. Improved use of the carry-save representation for the synthesis of complex arithmetic circuits , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..
[16] Andrew G. Dempster,et al. Multiplier blocks using carry-save adders , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).
[17] Ryan Kastner,et al. Optimizing High Speed Arithmetic Circuits Using Three-Term Extraction , 2006, Proceedings of the Design Automation & Test in Europe Conference.