Exploring factored forms for sequential implication logic synthesis

This work proposes the use of non-recursive factored forms in material implication logic as a way to increase performance with a small additional cost in the number of required devices. Previous works addressing memristor based implication logic focus only on recursive forms. The utilization of factored forms can reduce the number of operations. Since this kind of logic is naturally sequential, the number of operations is direct related to the computation time. However, additional devices may be needed. Considering all Boolean functions up to 4 inputs, the average reduction in the number of implications when using factored forms instead of recursive forms is 8%. The best case of reduction obtained was 60% by adding only one extra memristor.

[1]  Siegfried Selberherr,et al.  Implication logic gates using spin-transfer-torque-operated magnetic tunnel junctions for intrinsic logic-in-memory , 2013 .

[2]  Mansoor Alam,et al.  Comprehensive majority/minority logic synthesis method , 2013, 2013 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013).

[3]  Pinaki Mazumder,et al.  Digital circuit applications of resonant tunneling devices , 1998, Proc. IEEE.

[4]  Wei Lu,et al.  Nanowire Transistor Performance Limits and Applications , 2008, IEEE Transactions on Electron Devices.

[5]  Gregory S. Snider,et al.  ‘Memristive’ switches enable ‘stateful’ logic operations via material implication , 2010, Nature.

[6]  Mayler G. A. Martins,et al.  Functional composition: A new paradigm for performing logic synthesis , 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

[7]  S. Kvatinsky,et al.  The Desired Memristor for Circuit Designers , 2013, IEEE Circuits and Systems Magazine.

[8]  Massimiliano Di Ventra,et al.  Neuromorphic, Digital, and Quantum Computation With Memory Circuit Elements , 2010, Proceedings of the IEEE.

[9]  Sung-Mo Kang,et al.  Reconfigurable Stateful nor Gate for Large-Scale Logic-Array Integrations , 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

[10]  Sally A. McKee,et al.  Hitting the memory wall: implications of the obvious , 1995, CARN.

[11]  Yuan Taur,et al.  Device scaling limits of Si MOSFETs and their application dependencies , 2001, Proc. IEEE.

[12]  Sabrina Hirsch,et al.  Logic Minimization Algorithms For Vlsi Synthesis , 2016 .

[13]  L.O. Chua,et al.  Memristive devices and systems , 1976, Proceedings of the IEEE.

[14]  Xuejun Yang,et al.  Performing Stateful Logic on Memristor Memory , 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.

[15]  Stanisa Dautovic,et al.  Recursive Boolean Formula Minimization Algorithms for Implication Logic , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[16]  Mayler G. A. Martins,et al.  Synthesis of threshold logic gates to nanoelectronics , 2013, 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI).

[17]  A. Seabaugh,et al.  Graphene Nanoribbon Tunnel Transistors , 2008, IEEE Electron Device Letters.

[18]  Spyros Tragoudas,et al.  An efficient heuristic to identify threshold logic functions , 2012, JETC.

[19]  J. S. Friedman,et al.  A Spin-Diode Logic Family , 2012, IEEE Transactions on Nanotechnology.

[20]  Mika Laiho,et al.  Cellular nanoscale network cell with memristors for local implication logic and synapses , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[21]  Jussi H. Poikonen,et al.  On Synthesis of Boolean Expressions for Memristive Devices Using Sequential Implication Logic , 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[22]  Jeyavijayan Rajendran,et al.  An Energy-Efficient Memristive Threshold Logic Circuit , 2012, IEEE Transactions on Computers.

[23]  J. Poikonen,et al.  Erratum for Two memristors suffice to compute all Boolean functions , 2010 .

[24]  L. Chua Memristor-The missing circuit element , 1971 .

[25]  Mircea R. Stan,et al.  The Promise of Nanomagnetics and Spintronics for Future Logic and Universal Memory , 2010, Proceedings of the IEEE.

[26]  Siegfried Selberherr,et al.  Reliability Analysis and Comparison of Implication and Reprogrammable Logic Gates in Magnetic Tunnel Junction Logic Circuits , 2013, IEEE Transactions on Magnetics.

[27]  Byunghoo Jung,et al.  Material implication in CMOS: A new kind of logic , 2012, DAC Design Automation Conference 2012.

[28]  E. McCluskey Minimization of Boolean functions , 1956 .

[29]  Christofer Toumazou,et al.  Two centuries of memristors. , 2012, Nature materials.

[30]  Yun Shang,et al.  An Optimized Majority Logic Synthesis Methodology for Quantum-Dot Cellular Automata , 2010, IEEE Transactions on Nanotechnology.

[31]  Mika Laiho,et al.  Stateful implication logic with memristors , 2009, 2009 IEEE/ACM International Symposium on Nanoscale Architectures.

[32]  Mayler G. A. Martins,et al.  Spin diode network synthesis using functional composition , 2013, 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI).

[33]  N. Zimmerman,et al.  Fabrication and Electrical Characterization of Fully CMOS-Compatible Si Single-Electron Devices , 2012, IEEE Transactions on Electron Devices.

[34]  Sung-Mo Kang,et al.  Field Programmable Stateful Logic Array , 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[35]  Alex Pappachen James,et al.  Resistive Threshold Logic , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[36]  Uri C. Weiser,et al.  Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[37]  J Joshua Yang,et al.  Memristive devices for computing. , 2013, Nature nanotechnology.

[38]  P. D. Tougaw,et al.  A device architecture for computing with quantum dots , 1997, Proc. IEEE.