Applying the Semi-Markov Memory and Cache Coherence Interference Model to an Updating Based Cache Coherence Protocol

In this paper, we propose a method to apply the Semimarkov Memory and Cache coherence Interference (SMCI) model, which we had proposed for parallel computers with an invalidating based cache coherence protocol, to an updating based protocol. The proposed model, SMCI/Dragon, predicts the performance of cache coherent parallel computers with Dragon protocol with extremely inexpensive computational costs. Using the extended model, we investigate several comparative experiments with widely known simulation. The results show that there are only 5.4% differences.