A compact analytical current model including traps effects for GS DG MOSFETs

Due to the excellent control of DG MOSFETs over the short channel effects, they have been considered as a leading candidate to extend the scaling limit of conventional bulk MOSFETs. However, the hot carrier injection into gate oxides remains a potential problem in reliability field hence altering the device lifetime. In the present paper, a comprehensive drain current model incorporating hot-carrier-induced degradation effect is developed, the derivation is carried out based on some assumptions regarding threshold voltage and mobility. Using obtained model, we have studied the utility of adding a high-k layer into the device structure for which an improvement is detected, the accuracy and efficiency make our analytic current-voltage model for DG MOSFETs suitable for circuit simulation programs.