Performance studies of routing schemes for packet switched augmented shuffle exchange network

This paper presents a simulation study to compare the performance of four different routing schemes for a internally buffered packet switched fault-tolerant augmented shuffle exchange network. The performance is measured in terms of throughput and delay for uniform and non-uniform traffic patterns under fault-free and faulty environments. The simulation results indicate that the "look ahead" scheme proposed by Peir and Lee (1993) provides the best throughput at a minimum delay under non-uniform traffic with and without faults.

[1]  Dharma P. Agrawal,et al.  A Survey and Comparision of Fault-Tolerant Multistage Interconnection Networks , 1987, Computer.

[2]  J.S. Park,et al.  Performance studies of packet switched augmented shuffle exchange networks , 1992, [Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation.

[3]  Howard Jay Siegel,et al.  A survey and comparison of fault-tolerant multistage interconnection networks , 1994 .

[4]  Hamid Ahmadi,et al.  A survey of modern high-performance switching techniques , 1989, IEEE J. Sel. Areas Commun..

[5]  Yann-Hang Lee,et al.  Look-Ahead Routing Switches for Multistage Interconnection Networks , 1993, J. Parallel Distributed Comput..

[6]  Sudhakar M. Reddy,et al.  Augmented Shuffle-Exchange Multistage Interconnection Networks , 1987, Computer.

[7]  H. T. Mouftah,et al.  ATM Switch Architectures with Input-Output-Buffering: Effect of Input Traffic Correlation, Contention Resolution Policies, Buffer Allocation Strategies and Delay in Backpressure Signal , 1994, Comput. Networks ISDN Syst..

[8]  Gregory F. Pfister,et al.  “Hot spot” contention and combining in multistage interconnection networks , 1985, IEEE Transactions on Computers.

[9]  Howard Jay Siegel,et al.  The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems , 1982, IEEE Transactions on Computers.

[10]  Daniel M. Dias,et al.  Analysis and Simulation of Buffered Delta Networks , 1981, IEEE Transactions on Computers.