MULTIBIT CONVOLUTION USING A BIT LEVEL SYSTOLIC ARRAY.
暂无分享,去创建一个
[1] John V. McCanny,et al. Implementation of signal processing functions using 1-bit systolic arrays , 1982 .
[2] John V. McCanny,et al. Novel Multibit Convolver/Correlator Chip Design Based On Systolic Array Principles , 1982, Other Conferences.
[3] J. G. McWhirter,et al. Yield enhancement of bit level systolic array chips using fault tolerant techniques , 1983 .
[4] A. Corry,et al. Architecture of a CMOS correlator , 1983 .
[5] John G. McWhirter,et al. Completely iterative, pipelined multiplier array suitable for VLSI , 1982 .
[6] Richard F. Lyon,et al. Two's Complement Pipeline Multipliers , 1976, IEEE Trans. Commun..
[7] H. T. Kung,et al. A Two-Level Pipelined Systolic Array for Convolutions , 1981 .
[8] Bruce A. Wooley,et al. A Two's Complement Parallel Array Multiplication Algorithm , 1973, IEEE Transactions on Computers.