Verification Algorithms for Asynchronous Circuits

Application of asynchronous circuits has become one of the most promising directions in circuit design because asynchronous circuits are free of clock skews. Since the complexity of asynchronous circuits is much larger than the complexity of synchronous circuits, automatic verification tools are urgently required to guarantee the quality and performance of asynchronous circuits. The cores of those tools are verification algorithms which can be formulated as five types of model: logic, algebraic, symbolic, numerical and geometrical model. In this paper, verification algorithms for asynchronous circuit are surveyed by selecting several representative ones from those models and summarized and comparing them from several aspects. Those aspects include model structure, graphical specification, problem formulation, theoretical background, computational complexity, and applicable area. All summarizations and comparisons are undertaken in a framework of applications, i.e., all algorithms are classified as two classes by two key problems induced from real applications: timing analysis of events and exploration of state space. Several typical algorithms and their examples of applications are specified. In this paper, a comprehensive map of the asynchronous circuit verification algorithms is revealed for engineers and researchers. And basic principles for choosing appropriate verification algorithms are summarized. In the future, symbolic and approximate method will be the promising directions.

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