Compact model and circuit simulations for asymmetric, independent gate FinFETs

We present a rigorous surface-potential-based compact model of independent-gate asymmetric FinFETs enabled by solving several long-standing theoretical problems. The model is verified with TCAD simulations and is implemented in a standard circuit simulator. Simulation examples for both digital and analog circuits verify good model convergence and demonstrate the capabilities of new circuit topologies that can be implemented using independent-gate asymmetric FinFETs.

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