The Case for Dynamic Execution on Dynamic Hardware

We present a dynamic dataflow execution model, called the aggregated hierarchical abstract hardware architecture (or AHAHA), for use in FPGA based applications. High level language implementations targetting FPGAs use either handshaking or control-path solutions to schedule computations. Among the handshaking variety are the Compaan VHDL Visitor; the control-path solution uses a simplified form of handshaking which operates only in the same direction as the data flows and is used for example in MAP-C.

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