Resistive Ternary Content Addressable Memory Systems for Data-Intensive Computing

Power dissipation and memory bandwidth are significant performance bottlenecks in virtually all computer systems. Associative computing with ternary content addressable memory (TCAM) holds the potential to address both problems in a wide range of data intensive workloads. Power dissipation is reduced by eliminating instruction processing and data movement overheads present in a purely RAM-based system. Bandwidth demand is lowered by processing data directly on the TCAM chip, thereby decreasing off-chip traffic. Unfortunately, existing SRAM-based TCAM cells are more than 90 times larger than a DRAM cell at the same technology node, which limits the capacity of commercially available TCAMs to a few megabytes. This article examines the integration of gigascale TCAM systems based on resistive memories within a general-purpose computing platform. TCAM density is improved by novel, resistive memory cells that exploit phase change and spin-toque transfer magnetoresistive RAM technologies. TCAM chips are organized into a DDR3-compatible DIMM and are accessed through a software library with zero modifications to the processor or the motherboard. The proposed TCAM systems achieve average speedups of 3 to 4.5 times and average energy reductions of 5 to 8 times as compared to a conventional RAM-based system.

[1]  Christoforos E. Kozyrakis,et al.  Evaluating MapReduce for Multi-core and Multiprocessor Systems , 2007, 2007 IEEE 13th International Symposium on High Performance Computer Architecture.

[2]  John L. Henning SPEC CPU2000: Measuring CPU Performance in the New Millennium , 2000, Computer.

[3]  Eby G. Friedman,et al.  AC-DIMM: associative computing with STT-MRAM , 2013, ISCA.

[4]  Engin Ipek,et al.  A resistive TCAM accelerator for data-intensive computing , 2011, 2011 44th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

[5]  Ki-Whan Song,et al.  A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW , 2011, 2011 IEEE International Solid-State Circuits Conference.

[6]  Yu Cao,et al.  New generation of predictive technology model for sub-45nm design exploration , 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

[7]  Trevor Mudge,et al.  MiBench: A free, commercially representative embedded benchmark suite , 2001 .

[8]  Ashish Goel,et al.  Small subset queries and bloom filters using ternary associative memories, with applications , 2010, SIGMETRICS '10.