Predictable Flight Management System Implementation on a Multicore Processor

This paper presents an approach for hosting a representative avionic function on a distributed-memory mul-ticore COTS architecture. This approach was developed in collaboration by Thales and ONERA, in order to improve the performance of the function while enforcing its predictability. Once the target avionic function and the multicore architecture have been introduced, the execution model and the needed basic services are described and evaluated.

[1]  Martin Schoeberl,et al.  Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach , 2011, PPES.

[2]  Pascal Sainrat,et al.  OTAWA: An Open Toolbox for Adaptive WCET Analysis , 2010, SEUS.

[3]  Lothar Thiele,et al.  Worst case delay analysis for memory interference in multicore systems , 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

[4]  Jakob Engblom,et al.  The worst-case execution-time problem—overview of methods and survey of tools , 2008, TECS.

[5]  Marco Caccamo,et al.  A Predictable Execution Model for COTS-Based Embedded Systems , 2011, 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium.

[6]  Francisco J. Cazorla,et al.  Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability , 2010, IEEE Micro.

[7]  Claire Pagetti,et al.  Mapping a multi-rate synchronous language to a many-core processor , 2013, 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS).

[8]  Lothar Thiele,et al.  Timing Analysis for TDMA Arbitration in Resource Sharing Systems , 2010, 2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium.

[9]  Hugues Cassé,et al.  Deterministic Execution Model on COTS Hardware , 2012, ARCS.

[10]  Lui Sha,et al.  Real-Time I/O Management System with COTS Peripherals , 2013, IEEE Transactions on Computers.