Corner-field induced drain leakage in thin oxide MOSFETs

A new type of leakage current between drain and substrate (n-well) in thin oxide (120A-285A) n- and p-channel MOSFET's fabricated with standard CMOS n-well process is investigated. Experimental results indicate that the origin of this leakage is due to band-to-band tunneling occurring at the deep-depleted drain junction corner. It is shown that the tunnelingI-Vbehavior can be adequately described by the analytical expression ofJ = B_{1}E_{si} \exp (-B_{2}/E_{si}). The critical drain voltage corresponding to the onset of tunneling is empirically found to be 1.3 V higher in p-channel than in n-channel. Device structures with graded junctions, such as double-diffused and LDD, are also studied and demonstrated to be effective in suppressing this leakage current.

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