An Image-Recognition System Implemented on Hierarchical Parallel Architectures

The paper describes a parallel implementation of a vision system based on associative memories. The proposed real-time image-recognition system is based on the associative 'noise-like coding' model and is implemented on transputer-based tree structures. A high-performance device, the 'complex node' (CN), is introduced. The CN integrates two transputers by a dual-port memory and supports a total of eight links. Tree structures increase their throughput performance when CNs are included. A CN-including tree architecture is compared with a standard transputer-based tree structure having the same computational power. A comparative performance analysis shows the improvement in efficiency obtained when the novel device is used. In addition, theoretical derivations lead to a formula for the system's efficiency, and one demonstrates that expected values fit with measured ones, thus confirming the validity of the overall approach.

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