A REVIEW PAPER ON DESIGN AND SYNTHESIS OF TWO - STAGE CMOS OP-AMP

This paper presents a well defined method for the design of a two-stage CMOS operational amplifier. The OPAMP which has been designed is two stage CMOS OPAMP followed by an output buffer. The op-amp which has been designed, exhibits a unity gain frequency of 14MHz and a gain of 77.25dB with 85.85 � phase margin. A new technique which takes into account the effect of transfer function zeros, which are traditionally neglected, has been proposed. The simplest frequency compensation technique employs the Miller effect by connecting a compensation capacitor across the high-gain stage. The compensation method results in higher unity gain bandwidth under the same load condition. Both the theoretical calculations and computer aided simulation analysis have been given in detail. Design has been carried out in Mentor graphics tool. Simulation results have been verified using Model Sim Eldo and Design Architect IC . The simulation results in a tsmc 0.35um CMOS process from a 5V voltage supply demonstrate the designed has a gain 77.25dB.

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