论文信息 - Scalable 10 Gbit/s 4 × 2 0.25 [micro sign]m CMOS/SIMOX ATM switch LSI circuit based on distributed contention control

Scalable 10 Gbit/s 4 × 2 0.25 [micro sign]m CMOS/SIMOX ATM switch LSI circuit based on distributed contention control

A scalable 10 Gbit/s 4/spl times/2 ATM switch LSI circuit has been fabricated. It employs a new distributed contention control technique that makes the LSI circuit expandable. To increase the LSI circuit throughput, 0.2 /spl mu/m CMOS/SIMOX (separation by implanted oxygen) technology is used. It allows the LSI circuit to offer 221 I/O pins, an operating speed of 1.25 Gbit/s and 7 W power consumption.

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