Multistage parallel interference cancellation: convergence behavior and improved performance through limit cycle mitigation

This paper investigates the convergence behavior of the hard-decision multistage parallel interference cancellation (PIC) detector in synchronous code division multiple access (CDMA) communication systems with random spreading sequences. Hard-decision multistage PIC is known to possess three desirable properties for multiuser detectors: a) low computational complexity, b) low decision latency due to parallel computation, and c) good bit error rate (BER) performance due the fact that the optimum (joint maximum likelihood) symbol estimates are a fixed point of the iteration. With respect to the third property, hard-decision multistage PIC detection is also known to sometimes demonstrate two modes of undesirable convergence behavior: convergence to suboptimum fixed points and limit cycles. The results in this paper show that limit cycles are often the dominant source of performance degradation. To improve the performance of the hard-decision multistage PIC detector, we propose a class of limit cycle mitigation algorithms that reactively correct for limit cycles and provide a tradeoff between performance gain and increased computational complexity. Computer simulations suggest that significant performance gains may be possible in some cases with only modest increases in computational complexity.