Radiation sensitivity of XOR topologies in multigate technologies under voltage variability

Integrated Circuits are becoming more susceptible to numerous effects due to the reduction of its robustness to externai noise. Additionally, the increase of uncertainty degree related to the many sources of variation in the manufacturing process contributes to the reliability issues. This work is aimed at presenting a comparative analysis of radiation sensitivity of different XOR implementations using two multigate devices: double-gate FinFET and Trigate. Trigate-based circuits have shown to be more robust than FinFET with improvement percentage from 6,2% up to 12,6% in the threshold LET. Further, voltage fluctuation can reduce the threshold LET up to 20,8%, increasing the susceptibility of the analyzed circuits.

[1]  Jan M. Rabaey,et al.  Digital Integrated Circuits: A Design Perspective , 1995 .

[2]  Isabelle Ferain,et al.  Multigate transistors as the future of classical metal–oxide–semiconductor field-effect transistors , 2011, Nature.

[3]  D. R. Ball,et al.  Heavy-Ion-Induced Current Transients in Bulk and SOI FinFETs , 2012, IEEE Transactions on Nuclear Science.

[4]  R.C. Baumann,et al.  Radiation-induced soft errors in advanced semiconductor technologies , 2005, IEEE Transactions on Device and Materials Reliability.

[5]  Guillaume Hubert,et al.  Impact of scaling on the soft error sensitivity of bulk, FDSOI and FinFET technologies due to atmospheric radiation , 2015, Integr..

[6]  V. Rao,et al.  Thermal performance of nano-scale SOI and bulk FinFETs , 2016, 2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm).

[7]  Cristina Meinhardt,et al.  Impact of PVT variability on 20 nm FinFET standard cells , 2015, Microelectron. Reliab..

[8]  Asen Asenov,et al.  Comparative Simulation Analysis of Process-Induced Variability in Nanoscale SOI and Bulk Trigate FinFETs , 2013, IEEE Transactions on Electron Devices.

[9]  G. C. Messenger,et al.  Collection of Charge on Junction Nodes from Ion Tracks , 1982, IEEE Transactions on Nuclear Science.

[10]  C. Hu,et al.  FinFET-a self-aligned double-gate MOSFET scalable to 20 nm , 2000 .

[11]  Suman Datta,et al.  Soft-Error Performance Evaluation on Emerging Low Power Devices , 2014, IEEE Transactions on Device and Materials Reliability.

[12]  Marisa López-Vallejo,et al.  Evolution of radiation-induced soft errors in FinFET SRAMs under process variations beyond 22nm , 2015, Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH´15).

[13]  Jean-Pierre Colinge,et al.  FinFETs and Other Multi-Gate Transistors , 2007 .

[14]  Xin Sun,et al.  Tri-Gate Bulk MOSFET Design for CMOS Scaling to the End of the Roadmap , 2008, IEEE Electron Device Letters.

[15]  M. Saxena,et al.  Gate All Around MOSFET With Vacuum Gate Dielectric for Improved Hot Carrier Reliability and RF Performance , 2013, IEEE Transactions on Electron Devices.

[16]  M. Gaillardin,et al.  Modeling Single Event Transients in Advanced Devices and ICs , 2015, IEEE Transactions on Nuclear Science.

[17]  P E Dodd,et al.  Current and Future Challenges in Radiation Effects on CMOS Electronics , 2010, IEEE Transactions on Nuclear Science.

[18]  Rajeev Ranjan,et al.  Investigation on asymmetric dual-k spacer (ADS) Trigate Wavy FinFET: A novel device , 2016, 2016 3rd International Conference on Devices, Circuits and Systems (ICDCS).

[19]  Paulo F. Butzen,et al.  PVT variability analysis of FinFET and CMOS XOR circuits at 16nm , 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).