Automated power gating methodology for dataflow-based reconfigurable systems

Modern embedded systems designers are required to implement efficient multi-functional applications, over portable platforms under strong energy and resources constraints. Automatic tools may help them in challenging such a complex scenario: to develop complex reconfigurable systems while reducing time-to-market. At the same time, automated methodologies can aid them to manage power consumption. Dataflow models of computation, thanks to their modularity, turned out to be extremely useful to these purposes. In this paper, we will demonstrate as they can be used to automatically achieve power management since the earliest stage of the design flow. In particular, we are focussing on the automation of power gating. The methodology has been evaluated on an image processing use case targeting an ASIC 90 nm CMOS technology.

[1]  Edward A. Lee,et al.  Dataflow process networks , 1995, Proc. IEEE.

[2]  Luigi Raffo,et al.  Reconfigurable Coprocessor for Multimedia Application Domain , 2006, J. VLSI Signal Process..

[3]  Jean-François Nezan,et al.  Multi-purpose systems: A novel dataflow-based generation and mapping strategy , 2012, 2012 IEEE International Symposium on Circuits and Systems.

[4]  John Lach,et al.  Highly Flexible Multimode Digital Signal Processing Systems Using Adaptable Components and Controllers , 2006, EURASIP J. Adv. Signal Process..

[5]  Malgorzata Marek-Sadowska,et al.  Benefits and costs of power-gating technique , 2005, 2005 International Conference on Computer Design.

[6]  Luigi Raffo,et al.  Coarse-grained reconfiguration: dataflow-based power management , 2015, IET Comput. Digit. Tech..

[7]  Brian Jeff.  Advances in big.LITTLE Technology for Power and Energy Savings Improving Energy Efficiency in High-Performance Mobile Platforms , 2012 .

[8]  Luigi Raffo,et al.  The Multi-Dataflow Composer tool: A runtime reconfigurable HDL platform composer , 2011, Proceedings of the 2011 Conference on Design & Architectures for Signal & Image Processing (DASIP).

[9]  Paolo Meloni,et al.  The multi-dataflow composer tool: generation of on-the-fly reconfigurable platforms , 2012, Journal of Real-Time Image Processing.

[10]  Jorn W. Janneck,et al.  Coarse grain clock gating of streaming applications in programmable logic implementations , 2014, Proceedings of the 2014 Electronic System Level Synthesis Conference (ESLsyn).

[11]  Luca Benini,et al.  Timing-driven row-based power gating , 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).