Optimization by iterative improvement: an experimental evaluation on two-way partitioning
暂无分享,去创建一个
[1] Chung-Kuan Cheng,et al. Multiple-level partitioning: an application to the very large-scale hardware simulator , 1991 .
[2] R. M. Mattheyses,et al. A Linear-Time Heuristic for Improving Network Partitions , 1982, 19th Design Automation Conference.
[3] C. D. Gelatt,et al. Optimization by Simulated Annealing , 1983, Science.
[4] Brian W. Kernighan,et al. An efficient heuristic procedure for partitioning graphs , 1970, Bell Syst. Tech. J..
[5] Carl Sechen,et al. An improved objective function for mincut circuit partitioning , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[6] David S. Johnson,et al. Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .
[7] Chung-Kuan Cheng,et al. An efficient multilevel placement technique using hierarchical partitioning , 1992 .
[8] Chingwei Yeh,et al. A general purpose multiple way partitioning algorithm , 1991, DAC '91.
[9] Balakrishnan Krishnamurthy,et al. An Improved Min-Cut Algonthm for Partitioning VLSI Networks , 1984, IEEE Transactions on Computers.
[10] Cecilia R. Aragon,et al. Optimization by Simulated Annealing: An Experimental Evaluation; Part I, Graph Partitioning , 1989, Oper. Res..