Chemical-mechanical polishing (CMP) appears to be the most promising technology for global planarization of device topography and metal patterning in the damascene technique. Cu has been recently studied as a candidate material for future integrated circuit metallization because of its low resistivity and better electromigration resistance than current Al alloy interconnects. In order to achieve a highly reliable CMP process for Cu delineation it is necessary to examine the limitations of the process. Integrating Cu CMP into an interconnect processing sequence requires a detailed understanding of how process parameters affect different aspects of the CMP process and therefore the quality of the patterned lines.
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