Implementation of a NURBS to Bézier Conversor with Constant Latency

In this paper, a FPGA implementation is presented to carry out the conversion process from NURBS to BEzier curves. It has a simple and regular timing schedule with a constant latency which reduces the area requirements with respect to previous implementations. The operation frequency obtained with the Xilinx tools, is around 13 MHz. The scheme we propose can be easily extended to process NURBS and BEzier surfaces.