Stepwise equivalent conductance circuit simulation technique
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[1] A. Richard Newton,et al. Electrical-logic simulation and its applications , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[2] Basant R. Chawla,et al. Motis - an mos timing simulator , 1975 .
[3] Kishore Singhal,et al. Computer Methods for Circuit Analysis and Design , 1983 .
[4] Ernest S. Kuh,et al. Transient simulation of lossy interconnect , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.
[5] John K. Ousterhout. A Switch-Level Timing Verifier for Digital MOS VLSI , 1985, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[6] Robert K. Brayton,et al. XPSim: a MOS VLSI simulator , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.
[7] Ernest S. Kuh,et al. Transient simulation of lossy interconnects based on the recursive convolution formulation , 1992 .
[8] A. Richard Newton,et al. The exploitation of latency and multirate behavior using nonlinear relaxation for circuit simulation , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[9] Ibrahim N. Hajj,et al. IDSIM2: an environment for mixed-mode simulation , 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.
[10] Bryan D. Ackland,et al. Event-EMU: an event driven timing simulator for MOS VLSI circuits , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[11] Ronald A. Rohrer,et al. Piecewise approximate circuit simulation , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[12] Alberto L. Sangiovanni-Vincentelli,et al. Relaxation-based electrical simulation , 1983, IEEE Transactions on Electron Devices.
[13] Alberto L. Sangiovanni-Vincentelli,et al. The Waveform Relaxation Method for Time-Domain Analysis of Large Scale Integrated Circuits , 1982, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[14] Malgorzata Marek-Sadowska,et al. SWEC: a stepwise equivalent conductance timing simulator for CMOS VLSI circuits , 1991, Proceedings of the European Conference on Design Automation..