Improved hot-electron reliability in strained-Si nMOS

Strained-Si/relaxed-Si/sub 1-x/Ge/sub x/ structures provide a viable means of improving CMOS performance. For nMOS devices, the tensile strain in pseudomorphic Si on relaxed-Si/sub 1-x/Ge/sub x/ splits the six-fold degeneracy of the conduction band minimum, rendering increased electron mobility due to a lower in-plane effective mass and reduced intervalley scattering. In this paper, in addition to confirming enhanced performance for biaxial-strained-Si nMOS, we present hot-electron degradation characteristics for the first time, showing improvement over bulk Si.

[1]  Chenming Hu,et al.  Hot-electron-induced photon and photocarrier generation in Silicon MOSFET's , 1984, IEEE Transactions on Electron Devices.

[2]  F. J. Grunthaner,et al.  Radiation-Induced Defects in SiO2 as Determined with XPS , 1982, IEEE Transactions on Nuclear Science.

[3]  K. Rim,et al.  Transconductance enhancement in deep submicron strained Si n-MOSFETs , 1998, International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).

[4]  S. Lai,et al.  Interface trap generation in silicon dioxide when electrons are captured by trapped holes , 1983 .

[5]  H.I. Smith,et al.  Electron velocity overshoot at room and liquid nitrogen temperatures in silicon inversion layers , 1988, IEEE Electron Device Letters.

[6]  A. Tasch,et al.  A pseudo-lucky electron model for simulation of electron gate current in submicron NMOSFET's , 1996 .

[7]  Elyse Rosenbaum,et al.  Projecting lifetime of deep submicron MOSFETs , 2001 .

[8]  H.I. Smith,et al.  Observation of electron velocity overshoot in sub-100-nm-channel MOSFET's in Silicon , 1985, IEEE Electron Device Letters.

[9]  B. F. Lewis,et al.  XPS Studies of Structure-Induced Radiation Effects at the Si/SiO2 Interface , 1980, IEEE Transactions on Nuclear Science.

[10]  T. Ma,et al.  Dependence of X-Ray Generation of Interface Traps on Gate Metal Induced Interfacial Stress in MOS Structures , 1984, IEEE Transactions on Nuclear Science.

[11]  J. Welser,et al.  Strain dependence of the performance enhancement in strained-Si n-MOSFETs , 1994, Proceedings of 1994 IEEE International Electron Devices Meeting.

[12]  G. Groeseneken,et al.  Consistent model for the hot-carrier degradation in n-channel and p-channel MOSFETs , 1988 .

[13]  E. Takeda,et al.  An empirical model for device degradation due to hot-carrier injection , 1983, IEEE Electron Device Letters.

[14]  C. Hu.  Lucky-electron model of channel hot electron emission , 1979, 1979 International Electron Devices Meeting.

[15]  E. Takeda,et al.  A new aspect on mechanical stress effects in scaled MOS devices , 1990 .

[16]  H. Nayfeh,et al.  Strained silicon MOSFET technology , 2002, Digest. International Electron Devices Meeting,.

[17]  T. Tezuka,et al.  High performance CMOS operation of strained-SOI MOSFETs using thin film SiGe-on-insulator substrate , 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

[18]  Effect of stress relaxation on the generation of radiation‐induced interface traps in post‐metal‐annealed Al‐SiO2‐Si devices , 1984 .

[19]  M. Ieong,et al.  Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs , 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

[20]  P. Bai,et al.  A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low k ILD, and 1 /spl mu/m/sup 2/ SRAM cell , 2002, Digest. International Electron Devices Meeting,.

[21]  Karl Hess,et al.  Reliability scaling issues for nanoscale devices , 2003 .

[22]  D. Antoniadis,et al.  Investigating the relationship between electron mobility and velocity in deeply scaled NMOS via mechanical stress , 2001, IEEE Electron Device Letters.

[23]  C. Hu,et al.  Lucky-electron model of channel hot-electron injection in MOSFET'S , 1984 .

[24]  A. Hamada,et al.  A new aspect on mechanical stress effects in scaled MOS devices , 1990, Digest of Technical Papers.1990 Symposium on VLSI Technology.

[25]  S. Laux,et al.  Band structure, deformation potentials, and carrier mobility in strained Si, Ge, and SiGe alloys , 1996 .

[26]  M. Lundstrom.  On the mobility versus drain current relation for a nanoscale MOSFET , 2001, IEEE Electron Device Letters.

[27]  T. Vogelsang,et al.  Electron transport in strained Si layers on Si1−xGex substrates , 1993 .

[28]  Giuseppe La Rosa,et al.  A review of hot-carrier degradation mechanisms in MOSFETs , 1996 .

[29]  R. Degraeve,et al.  Analysis of externally imposed mechanical stress effects on the hot-carrier-induced degradation of MOSFET's , 1994, Proceedings of 1994 IEEE International Reliability Physics Symposium.

[30]  A. Grill,et al.  Strained Si NMOSFETs for high performance CMOS technology , 2001, 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).

[31]  M. Tsukiji,et al.  Mechanical Stress Dependence of Radiation Effects in MOS Structures , 1986, IEEE Transactions on Nuclear Science.