Towards a Hardware DSL Ecosystem : RubyRTL and Friends

For several years, hardware design has been undergoing a surprising revival: fueled by open source initiatives, various tools and architectures have recently emerged. This resurgence also involves new hardware description languages. Inspired by the Migen Python community, we present RubyRTL, a novel internal domain-specific language for hardware design embedded in the Ruby language. Ruby -- which is best known in the field of web design -- has proven to be an excellent solution for the design of such DSLs, because of its meta-programming features. This paper presents the main aspects of RubyRTL, along with illustrating examples. We also propose a language-neutral interchange format, named Sexpir, that allows to seamlessly exchange RTL designs between Migen Python DSL and RubyRTL. This paves the way for interactions between various agile communities in the field of open source hardware design.

[1]  Jean-Christophe Le Lann,et al.  LiteX: an open-source SoC builder and library based on Migen Python DSL , 2020, ArXiv.

[2]  Alberto L. Sangiovanni-Vincentelli,et al.  The Tides of EDA , 2003, IEEE Des. Test Comput..

[3]  Nachiket Kapre,et al.  Survey of domain-specific languages for FPGA computing , 2016, 2016 26th International Conference on Field Programmable Logic and Applications (FPL).

[4]  Melissa C. Smith,et al.  Enhancing Hardware Design Flows with MyHDL , 2015, FPGA.

[5]  Elad Alon,et al.  Generating the Next Wave of Custom Silicon , 2018, ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC).

[6]  Joseph McMahan,et al.  A pythonic approach for rapid hardware prototyping and instrumentation , 2017, 2017 27th International Conference on Field Programmable Logic and Applications (FPL).

[7]  Stephen A. Edwards,et al.  Hardware synthesis from a recursive functional language , 2015, 2015 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[8]  John Wawrzynek,et al.  Chisel: Constructing hardware in a Scala embedded language , 2012, DAC Design Automation Conference 2012.

[9]  Donggyu Kim,et al.  Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations , 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).