Energy efficient software-based self-test for wireless sensor network nodes

We consider self-testing of complete wireless nodes in the field through a low-energy software-based self-test (SBST) method. Energy consumption is optimized both for individual components such as a CPU, embedded memories, and an RF module, as well as at the system level, considering the interplay between module tests. We first derive a scheme for software-based tests with the least amount of cycles and with operands of least Hamming distance and weight. Time interleaving of module tests at the system level further reduces the overall test energy consumption

[1]  Christos A. Papachristou,et al.  Instruction randomization self test for processor cores , 1999, Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146).

[2]  Sujit Dey,et al.  Software-based self-testing methodology for processor cores , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Spiridon Nikolaidis,et al.  Instruction-level power consumption estimation of embedded processors for low-power applications , 2002, Comput. Stand. Interfaces.

[4]  Jian Shen,et al.  Native mode functional test generation for processors with applications to self test and design validation , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

[5]  Naehyuck Chang,et al.  Cycle-accurate energy consumption measurement and analysis: case study of ARM7TDMI , 2000, ISLPED '00.

[6]  Dimitris Gizopoulos,et al.  Software-based self-testing of embedded processors , 2005, IEEE Transactions on Computers.

[7]  Jen-Chieh Yeh,et al.  Flash memory built-in self-test using March-like algorithms , 2002, Proceedings First IEEE International Workshop on Electronic Design, Test and Applications '2002.

[8]  Yervant Zorian,et al.  Effective software self-test methodology for processor cores , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[9]  S.K. Gupta,et al.  A BIST Methodology for Comprehensive Testing of RAM with Reduced Heat Dissipation , 1996, Proceedings International Test Conference 1996. Test and Design Validity.

[10]  Zeljko Zilic,et al.  Design methodology for wireless nodes with printed antennas , 2005, Proceedings. 42nd Design Automation Conference, 2005..

[11]  Alfred V. Aho,et al.  Optimal Code Generation for Expression Trees , 1976, J. ACM.

[12]  Jacob A. Abraham,et al.  Test Generation for Microprocessors , 1980, IEEE Transactions on Computers.

[13]  B. S. Joshi,et al.  Efficient algorithms for microprocessor testing , 1998, Annual Reliability and Maintainability Symposium. 1998 Proceedings. International Symposium on Product Quality and Integrity.

[14]  G. Thiele,et al.  Antenna theory and design , 1981 .

[15]  Katarzyna Radecka,et al.  Architectures of increased availability wireless sensor network nodes , 2004, 2004 International Conferce on Test.

[16]  Sujit Dey,et al.  Embedded Software-Based Self-Test for Programmable Core-Based Designs , 2002, IEEE Des. Test Comput..

[17]  Ad J. van de Goor,et al.  Functional Testing of Current Microprocessors (applied to the Intel i860) , 1992, Proceedings International Test Conference 1992.