Optimal Pll Loop Filter Design for Mobile Wimax Via LMI

[1]  Daniel Y. Abramovitch,et al.  Lyapunov Redesign of Analog Phase-Lock Loops , 1989, 1989 American Control Conference.

[2]  Guan-Chyun Hsieh,et al.  Phase-locked loop techniques. A survey , 1996, IEEE Trans. Ind. Electron..

[3]  A. M. Fahim,et al.  A fast lock digital phase-locked-loop architecture for wireless applications , 2003 .

[4]  Roland E. Best.  Phase-locked loops : design, simulation, and applications , 2003 .

[5]  Uri Shaked,et al.  Mixed H∞/H2 design of digital phase‐locked loops with polytopic‐type uncertainties , 2002 .

[6]  Roland E. Best.  Phase-Locked Loops , 1984 .

[7]  L. Rabiner,et al.  Linear programming design of IIR digital filters with arbitrary magnitude function , 1974 .

[8]  Deepak Pareek,et al.  The Business of WiMAX , 2006 .

[9]  Tsung-Yu Chiou,et al.  Nonlinear Phase-Locked Loop design using semidefinite programming , 2008, 2008 16th Mediterranean Conference on Control and Automation.

[10]  Eby G. Friedman,et al.  Design and simulation of Fractional-N PLL frequency synthesizers , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[11]  Stephen P. Boyd,et al.  FIR filter design via semidefinite programming and spectral factorization , 1996, Proceedings of 35th IEEE Conference on Decision and Control.

[12]  Luiz Henrique Alves Monteiro,et al.  All-pole phase-locked loops: calculating lock-in range by using Evan's root-locus , 2006 .

[13]  Michael H. Perrott,et al.  Fractional-N frequency synthesizer design at the transfer function level using a direct closed loop realization algorithm , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[14]  Stephen P. Boyd,et al.  Optimization of phase-locked loop circuits via geometric programming , 2003, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003..

[15]  Jae S. Lim,et al.  Design of FIR filters by complex Chebyshev approximation , 1991, [Proceedings] ICASSP 91: 1991 International Conference on Acoustics, Speech, and Signal Processing.

[16]  Wasim Mohamed Munther Al-Baroudi.  Digital filter design using LMI based techniques. , 1997 .

[17]  N. E. Wu.  Analog phaselock loop design using Popov criterion , 2002, Proceedings of the 2002 American Control Conference (IEEE Cat. No.CH37301).

[18]  Chih-Kong Ken Yang,et al.  Jitter optimization based on phase-locked loop design parameters , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

[19]  Ken Kundert,et al.  Predicting the Phase Noise and Jitter of PLL-Based Frequency Synthesizers , 2009 .

[20]  Stephen P. Boyd,et al.  Linear Matrix Inequalities in Systems and Control Theory , 1994 .

[21]  Yung-Shan Chou,et al.  A Novel Loop Filter Design for Phase-Locked Loops , 2006, 2006 IEEE International Conference on Systems, Man and Cybernetics.

[22]  Houshang Karimi,et al.  A magnitude/phase-locked loop system based on estimation of frequency and in-phase/quadrature-phase amplitudes , 2004, IEEE Transactions on Industrial Electronics.

[23]  P. Parks,et al.  Liapunov redesign of model reference adaptive control systems , 1966 .

[24]  Uri Shaked,et al.  Mixed H/sub /spl infin///H/sub 2/ design of digital phase locked loops with polytopic type uncertainties , 2000, Proceedings of the 39th IEEE Conference on Decision and Control (Cat. No.00CH37187).

[25]  Noriyuki Komine,et al.  PLL Equivalent Augmented System Incorporated with State Feedback Designed by LQR , 2007 .

[26]  D. Abramovitch.  Analysis and design of a third order phase-lock loop , 1988, MILCOM 88, 21st Century Military Communications - What's Possible?'. Conference record. Military Communications Conference.

[27]  Stephen P. Boyd,et al.  Semidefinite Programming , 1996, SIAM Rev..

[28]  Oded Yaniv,et al.  Near optimal PLL design for decision feedback carrier and timing recovery , 1999, 1999 IEEE International Conference on Communications (Cat. No. 99CH36311).