Online Data Allocation for Hybrid Memories on Embedded Tele-health Systems

The developments of wearable devices such as Body Sensor Networks (BSNs) have greatly improved the capability of tele-health industry. Large amount of data will be collected from every local BSN in real-time. These data is processed by embedded systems including smart phone and tablet before has been transferred to distributed storage systems. Traditional on-chip SRAMs cause critical power leakage issues and occupy relatively large chip areas. Therefore, hybrid memories, which combine volatile memories with non-volatile memories, are widely adopted in reducing the latency and energy cost on multi-core systems. However, most of the current works are about static data allocation for hybrid memories. Those mechanisms cannot achieve better data placement in real-time. Hence, we propose an online hybrid memories placement for embedded tele-health system. Experimental results demonstrate the effectiveness of our approach.

[1]  Wei-Che Tseng,et al.  Data Allocation Optimization for Hybrid Scratch Pad Memory With SRAM and Nonvolatile Memory , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[2]  Meikang Qiu,et al.  Design and Optimization of Traffic Balance Broker for Cloud-Based Telehealth Platform , 2013, 2013 IEEE/ACM 6th International Conference on Utility and Cloud Computing.

[3]  Jun Yang,et al.  Energy reduction for STT-RAM using early write termination , 2009, 2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers.

[4]  Gu-Yeon Wei,et al.  Process Variation Tolerant 3T1D-Based Cache Architectures , 2007, 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007).

[5]  Carlos Molina,et al.  Non redundant data cache , 2003, ISLPED '03.

[6]  Norman P. Jouppi,et al.  Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0 , 2007, 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007).

[7]  Jian-Gang Zhu,et al.  Magnetoresistive Random Access Memory: The Path to Competitiveness and Scalability , 2008, Proceedings of the IEEE.

[8]  Zhi Chen,et al.  SPM-aware scheduling for nested loops in CMP systems , 2013, SIGBED.

[9]  Meikang Qiu,et al.  Dynamic and Leakage Energy Minimization With Soft Real-Time Loop Scheduling and Voltage Assignment , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[10]  Meikang Qiu,et al.  Cost minimization while satisfying hard/soft timing constraints for heterogeneous embedded systems , 2009, TODE.

[11]  Onur Mutlu,et al.  Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity DRAM Cache Management , 2012, IEEE Computer Architecture Letters.

[12]  Enhong Chen,et al.  Task Allocation on Nonvolatile-Memory-Based Hybrid Main Memory , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[13]  Meikang Qiu,et al.  Energy Minimization with Soft Real-time and DVS for Uniprocessor and Multiprocessor Embedded Systems , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[14]  Engin Ipek,et al.  Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing , 2010, ISCA.