A 175.2-mW 4-Stage OTA With Wide Load Range (400 pF–12 nF) Using Active Parallel Compensation

Multistage amplifiers are a reliable method of achieving high gain in systems where the voltage supply is low. The common practice is to prefer 3-stage amplifiers over 4-stage ones when a gain of < 120 dB is required, since the former are easier to compensate. In this article, we employ four stages to relax the constraints on each stage. An extension of the single-Miller-capacitor compensation and active-parallel compensation to a 4-stage operational transconductance amplifier (OTA) design in this work is capable of driving a capacitor range of 400 pF to 12 nF( $30\times $ ) by consuming a total power of about 175 mW and occupying only 0.007 mm2. This design achieved a unity-gain frequency (UGF) > 1.18 MGz and a phase margin (PM) of > 48° for all drivable load values. The proposed design, implemented in a standard CMOS 130-nm process, can drive a wide range of load capacitors without sacrificing any aspect of performance.

[1]  E. Sánchez-Sinencio,et al.  Multistage amplifier topologies with nested Gm-C compensation , 1997, IEEE J. Solid State Circuits.

[2]  Michiel Steyaert,et al.  Positive feedback frequency compensation for low-voltage low-power three-stage amplifier , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[3]  Man-Kay Law,et al.  A 0.016mm2 144μW three-stage amplifier capable of driving 1-to-15nF capacitive load with >0.95MHz GBW , 2012, 2012 IEEE International Solid-State Circuits Conference.

[4]  Wing-Hung Ki,et al.  A Cascode Miller-Compensated Three-Stage Amplifier With Local Impedance Attenuation for Optimized Complex-Pole Control , 2015, IEEE Journal of Solid-State Circuits.

[5]  Horst Zimmermann,et al.  Efficient four-stage frequency compensation for low-voltage amplifiers , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[6]  Mohammad Yavari,et al.  A low‐power four‐stage amplifier for driving large capacitive loads , 2014, Int. J. Circuit Theory Appl..

[7]  Boris Murmann,et al.  The Design of Fast-Settling Three-Stage Amplifiers Using the Open-Loop Damping Factor as a Design Parameter , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

[8]  Gyu-Hyeong Cho,et al.  A Pseudo Single-Stage Amplifier With an Adaptively Varied Medium Impedance Node for Ultra-High Slew Rate and Wide-Range Capacitive-Load Drivability , 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

[9]  Edgar Sanchez-Sinencio,et al.  Classification and Design Space Exploration of Low-Power Three-Stage Operational Transconductance Amplifier Architectures for Wide Load Ranges , 2019, Electronics.

[10]  Gaetano Palumbo,et al.  High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads , 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

[11]  Li Zhang,et al.  Dual AC Boosting Compensation Scheme for Multistage Amplifiers , 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

[12]  Gyu-Hyeong Cho,et al.  Design-Oriented Analysis for Miller Compensation and Its Application to Multistage Amplifier Design , 2017, IEEE Journal of Solid-State Circuits.

[13]  Man-Kay Law,et al.  Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate , 2015, IEEE Journal of Solid-State Circuits.

[14]  Ping Luo,et al.  Single capacitor with current amplifier compensation for ultra-large capacitive load three-stage amplifier , 2013, Microelectron. J..

[15]  J. Burleson,et al.  Maximum intrinsic gain degradation in technology scaling , 2007, 2007 International Semiconductor Device Research Symposium.

[16]  Willy Sansen,et al.  Nested feed-forward Gm-stage and nulling resistor plus nested-Miller compensation for multistage amplifiers , 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

[17]  Edgar Sanchez-Sinencio,et al.  Sound design of low power nested transconductance-capacitance compensation amplifiers , 1999 .

[18]  Marco Ho,et al.  A 0.7V 24µA Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW , 2015, IEEE J. Solid State Circuits.

[19]  Gaetano Palumbo,et al.  Advances in Reversed Nested Miller Compensation , 2007, IEEE Transactions on Circuits and Systems I: Regular Papers.

[20]  Ka Nang Leung,et al.  Three-stage large capacitive load amplifier with damping-factor-control frequency compensation , 2000, IEEE Journal of Solid-State Circuits.

[21]  Man-Kay Law,et al.  A 0.016-mm2 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With > 0.95-MHz GBW , 2013, IEEE J. Solid State Circuits.

[22]  Davide Marano,et al.  Optimized Active Single-Miller Capacitor Compensation With Inner Half-Feedforward Stage for Very High-Load Three-Stage OTAs , 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

[23]  Qi Cheng,et al.  Design and Analysis of Three-Stage Amplifier for Driving pF-to-nF Capacitive Load Based on Local Q-Factor Control and Cascode Miller Compensation Techniques , 2019, Electronics.

[24]  Gaetano Palumbo,et al.  High-performance frequency compensation topology for four-stage OTAs , 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

[25]  Gaetano Palumbo,et al.  Robust design of CMOS amplifiers oriented to settling‐time specification , 2017, Int. J. Circuit Theory Appl..

[26]  Jianping Guo,et al.  Enhanced active‐feedback frequency compensation with on‐chip‐capacitor reduction feature for amplifiers with large capacitive load , 2017, Int. J. Circuit Theory Appl..

[27]  W. Sansen,et al.  Transconductance with capacitances feedback compensation for multistage amplifiers , 2005, Proceedings of the 30th European Solid-State Circuits Conference.

[28]  Specifications and Architectures of Sample-and-Hold Amplifiers , 2022 .

[29]  Edgar Sánchez-Sinencio,et al.  Design of Three-Stage Class-AB 16 $\Omega$ Headphone Driver Capable of Handling Wide Range of Load Capacitance , 2009, IEEE Journal of Solid-State Circuits.

[30]  Johan H. Huijsing,et al.  Multistage Compensation Techniques , 1995 .

[31]  Davide Marano,et al.  Symbolic factorization methodology for multistage amplifier transfer functions , 2016, Int. J. Circuit Theory Appl..

[32]  K. Nagaraj.  CMOS amplifiers incorporating a novel slew rate enhancement technique , 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.

[33]  Mohammad Danaie,et al.  Frequency compensation of three-stage operational amplifiers: Sensitivity and robustness analysis , 2017, Microelectron. J..