Design and Research on Preprocessor Module of 10 Gbit/s Clock Recovery Circuit

This paper has introduced a preprocessor module fabricated in the 0.2μm GaAs PHEMT technology and used in clock recovery in 10 GBASE-R standard. The core part of the circuit is differential and frequency selection. The ADS is used to simulate the circuit, and the result of the simulation shows that the design can fulfill the requirement of the application. The layout of the circuit in Cadence is given.