A small-signal model for the frequency-dependent drain admittance in floating-substrate MOSFET's

The frequency-dependent drain admittance of silicon-on-sapphire (SOS) MOSFETs is examined from the perspective of the circuit designer. Measurements of small-signal drain characteristics as a function of frequency, bias conditions, and device geometry, which have major implications for analog circuit design, are presented. These are explained in terms of a small-signal circuit model. Physical explanations for the observations are given and the poles and zeros of the model identified to assist designers carrying out hand calculations with easily manipulated expressions. Frequency-dependent thermal effects are discussed. It is shown that similar effects can be expected in other SOI technologies. >