An Evolvable Hardware Layer for Global and Local Learning of Motor Control in a Hexapod Robot
暂无分享,去创建一个
[1] Alan F. Murray,et al. Analogue Neural Vlsi: A Pulse Stream Approach , 1994 .
[2] David E. Goldberg,et al. The compact genetic algorithm , 1999, IEEE Trans. Evol. Comput..
[3] Jason D. Lohn,et al. Automated Analog Circuit Sythesis Using a Linear Representation , 1998, ICES.
[4] Lawrence J. Fogel,et al. Artificial Intelligence through Simulated Evolution , 1966 .
[5] Thomas Bäck,et al. Evolutionary computation: comments on the history and current state , 1997, IEEE Trans. Evol. Comput..
[6] John C. Gallagher,et al. A Modified Compact Genetic Algorithm For The Intrinsic Evolution Of Continuous Time Recurrent Neural Networks , 2002, GECCO.
[7] Randall D. Beer,et al. Application of evolved locomotion controllers to a hexapod robot , 1996, Robotics Auton. Syst..
[8] John C. Gallagher,et al. The once and future analog alternative: evolvable hardware and analog computation , 2003, NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings..
[9] John R. Koza,et al. Automated synthesis of analog electrical circuits by means of genetic programming , 1997, IEEE Trans. Evol. Comput..
[10] Hiroshi Yokoi,et al. A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI , 1998, ICES.
[11] James M. Bower,et al. Modeling Small Oscillating Biological Networks in Analog VLSI , 1988, NIPS.
[12] Randall D. Beer,et al. A qualitative dynamical analysis of evolved locomotion controllers , 1993 .
[13] Laurent Tournier,et al. Approximation of dynamical systems using s-systems theory: application to biological systems , 2005, ISSAC.
[14] Robert G. Reynolds,et al. Evolutionary computation: Towards a new philosophy of machine intelligence , 1997 .
[15] John C. Gallagher. Evolution and analysis of mixed mode neural networks for walking: mixed pattern generators , 2001, Proceedings of the 2001 Congress on Evolutionary Computation (IEEE Cat. No.01TH8546).
[16] Adrian Thompson,et al. On the Automatic Design of Robust Electronics Through Artificial Evolution , 1998, ICES.
[17] Jack L. Meador,et al. Programmable impulse neural circuits , 1991, IEEE Trans. Neural Networks.
[18] Hans-Paul Schwefel,et al. Numerical Optimization of Computer Models , 1982 .
[19] Prabhas Chongstitvatana,et al. A hardware implementation of the Compact Genetic Algorithm , 2001, Proceedings of the 2001 Congress on Evolutionary Computation (IEEE Cat. No.01TH8546).
[20] John C. Gallagher,et al. An Examination of Hypermutation and Random Immigrant Variants of mrCGA for Dynamic Environments , 2003, GECCO.
[21] David E. Goldberg,et al. Genetic Algorithms in Search Optimization and Machine Learning , 1988 .
[22] Randall D. Beer,et al. Evolution and Analysis of Model CPGs for Walking: I. Dynamical Modules , 1999, Journal of Computational Neuroscience.
[23] Vu Duong,et al. Evolution of analog circuits on field programmable transistor arrays , 2000, Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware.
[24] Gunnar Tufte,et al. Bridging the genotype-phenotype mapping for digital FPGAs , 2001, Proceedings Third NASA/DoD Workshop on Evolvable Hardware. EH-2001.
[25] J J Hopfield,et al. Neurons with graded response have collective computational properties like those of two-state neurons. , 1984, Proceedings of the National Academy of Sciences of the United States of America.
[26] Carver Mead,et al. Analog VLSI and neural systems , 1989 .
[27] N. Yoshida,et al. Multi-GAP: parallel and distributed genetic algorithms in VLSI , 1999, IEEE SMC'99 Conference Proceedings. 1999 IEEE International Conference on Systems, Man, and Cybernetics (Cat. No.99CH37028).
[28] Yuichi Nakamura,et al. Approximation of dynamical systems by continuous time recurrent neural networks , 1993, Neural Networks.
[29] Marley M. B. R. Vellasco,et al. A reconfigurable platform for the automatic synthesis of analog circuits , 2000, Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware.
[30] John C. Gallagher,et al. A family of compact genetic algorithms for intrinsic evolvable hardware , 2004, IEEE Transactions on Evolutionary Computation.
[31] Marley M. B. R. Vellasco,et al. PAMA-programmable analog multiplexer array , 2001, Proceedings Third NASA/DoD Workshop on Evolvable Hardware. EH-2001.
[32] Hans-Paul Schwefel,et al. Evolution and optimum seeking , 1995, Sixth-generation computer technology series.
[33] John H. Holland,et al. Adaptation in Natural and Artificial Systems: An Introductory Analysis with Applications to Biology, Control, and Artificial Intelligence , 1992 .
[34] John C. Gallagher. Evolution and analysis of non-autonomous neural networks for walking: reflexive pattern generators , 2001, Proceedings of the 2001 Congress on Evolutionary Computation (IEEE Cat. No.01TH8546).
[35] David B. Fogel,et al. System Identification Through Simulated Evolution: A Machine Learning Approach to Modeling , 1991 .
[36] Hugo de Garis,et al. The second NASA/DoD workshop on evolvable hardware , 2001, IEEE Trans. Evol. Comput..
[37] Jordan B. Pollack,et al. The GOLEM project: evolving hardware bodies and brains , 2000, Proceedings. The Second NASA/DoD Workshop on Evolvable Hardware.
[38] Randall D. Beer,et al. On the Dynamics of Small Continuous-Time Recurrent Neural Networks , 1995, Adapt. Behav..
[39] David B. Fogel,et al. An introduction to simulated evolutionary optimization , 1994, IEEE Trans. Neural Networks.
[40] Kenji Toda,et al. Real-world applications of analog and digital evolvable hardware , 1999, IEEE Trans. Evol. Comput..
[41] Hitoshi Iba,et al. Analog circuit design with a variable length chromosome , 2000, Proceedings of the 2000 Congress on Evolutionary Computation. CEC00 (Cat. No.00TH8512).
[42] J. Hopfield. Neurons withgraded response havecollective computational properties likethoseoftwo-state neurons , 1984 .