The bit full-decomposition of sequential machines

Control units and serial processing units of today's information processing systems must realize complex processes, which are usually described in the form of a sequential machine or a number of cooperating sequential machines. Large machines are difficult to: design, optimize, implement and verify. Therefore, there is a real need for CAD tools, which could decompose a complex sequential machine into a number of smaller and less complicated partial machines. For many years, the decomposition of only the internal states of sequential machines has been studied. However, this sort of decomposition is not a sUfficient solution. The complexity of a circuit implementing a sequential machine is a function not only of machine's internal states but as well of inputs and outputs. Furthermore, the possibility to implement a machine with today's array logic building blocks depends not only on the number of internal states but as well on inputs and outputs. So, there is a real need for decompositions upon the states, inputs and outputs of a sequential machine, i.e. for fulldecompositions. During the full-decomposition process, the input and/or state and/or output symbols (values) can be decomposed or the input and/or state and/or output bits. So, it is possible to perform the symbol fulldecomposition or the bit full-decomposition. This report provides the classification of full-decompositions and describes briefly the theoretical foundations of bit fulldecomposition. Comparing to the symbol full-decomposition,the bit fulldecomposition has the following advantage: input and output decoders are reduced to an appropriate distribution of the primary input and output bits between the partial machines. In the report, definitions of a bit partition and bit partition pairs are introduced and their usefulness to bit full-decompositions is shown. It is proved, that the bit full-decomposition can be treated as a special case of the symbol full-decomposition; therefore, no new decomposition theory is needed for this case, but the symbol fulldecomposition theory together with the theorems introduced here constitute the theory of bit full-decomposition. Finally, a comparison is made between the symbol and the bit fulldecompositions and some practical conclusions and remarks are presented. In the appendix, an example is provided that illustrates the possibility and the practical usefulness of bit full-decomposition. Based on the developed theory, the CAD algorithms calculating different bit full-decompositions have been developed and implemented. Those algorithms and the practical results are presented and estimated in the separate paper [5]. Index Terms Automata theory, decomposition, logic design, sequential machines. Acknowledgements The author is indebted to Prof. ir. A. Heetman and Prof. ir. M. P.J. Stevens for making it possible to perform this work, to Dr. P.R. Attwood for making corrections to the English text and to mr. C. van de Watering for typing the text.