Effective graph theoretic techniques for the generalized low power binding problem

This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First the generalized low power binding problem is formulated as an Integer Linear Programming(ILP) problem which happens to be an NP-complete task to solve. Then two polynomial-time heuristics are proposed that provide a speedup of up to 13.7 with an extremely low penalty for power when compared to the optimal ILP solution for our selected benchmarks.

[1]  Ankur Srivastava,et al.  Predictability: definition, ananlysis and optimization , 2002, ICCAD 2002.

[2]  Ankur Srivastava,et al.  Predictability: Definition, Analysis and Optimization , 2002, IWLS.

[3]  Eike Schmidt,et al.  Estimation of lower and upper bounds on the power consumption from scheduled data flow graphs , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[4]  Majid Sarrafzadeh,et al.  A super-scheduler for embedded reconfigurable systems , 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

[5]  Massoud Pedram,et al.  Register Allocation and Binding for Low Power , 1995, 32nd Design Automation Conference.

[6]  Niraj K. Jha,et al.  An ILP formulation for low power based on minimizing switched capacitance during data path allocation , 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

[7]  Miodrag Potkonjak,et al.  MediaBench: a tool for evaluating and synthesizing multimedia and communications systems , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.