EXORCISM-MV-2: minimization of exclusive sum of products expressions for multiple-valued input incompletely specified functions
暂无分享,去创建一个
[1] P.W. Besslich,et al. An efficient program for logic synthesis of mod-2 sum expressions , 1991, Euro ASIC '91.
[2] Tsutomu Sasao,et al. Minimization of AND-EXOR Expressions Using Rewrite Rules , 1993, IEEE Trans. Computers.
[3] Marek A. Perkowski,et al. Multiple-valued generalized Reed-Muller forms , 1991, [1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic.
[4] John P. Robinson,et al. A Method for Modulo-2 Minimization , 1982, IEEE Transactions on Computers.
[5] Tsutomu Sasao. EXMIN: a simplification algorithm for exclusive-OR-sum-of-products expressions for multiple-valued input two-valued output functions , 1990, Proceedings of the Twentieth International Symposium on Multiple-Valued Logic.
[6] D. Green. Reed-Muller canonical forms with mixed polarity and their manipulations , 1990 .
[7] Xia Chen,et al. Mapping of Reed-Muller coefficients and the minimisation of exclusive OR-switching functions , 1982 .
[8] Tsutomu Sasao. EXMIN2: a simplification algorithm for exclusive-OR-sum-of-products expressions for multiple-valued-input two-valued-output functions , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[9] M. Perkowski,et al. Minimization of multiple-valued input multi-output mixed-radix exclusive sums of products for incompletely specified Boolean functions , 1989, Proceedings. The Nineteenth International Symposium on Multiple-Valued Logic.
[10] Donald Leo Dietmeyer,et al. Logic design of digital systems , 1971 .
[11] Harold Fleisher,et al. A Computer Algorithm for Minimizing Reed-Muller Canonical Forms , 1987, IEEE Transactions on Computers.
[12] Marek A. Perkowski,et al. A fast algorithm to minimize multi-output mixed-polarity generalized Reed-Muller forms , 1988, DAC '88.
[13] J. M. Saul. An improved algorithm for the minimization of mixed polarity Reed-Muller representations , 1990, Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors.
[14] Dhiraj K. Pradhan,et al. Fault-tolerant computing : theory and techniques , 1986 .
[15] P. Besslich. Efficient computer method for ExOR logic design , 1983 .
[16] George K. Papakonstantinou. Minimization of Modulo-2 Sum of Products , 1979, IEEE Transactions on Computers.
[17] Stephen Y. H. Su,et al. Computer Minimization of Multivalued Switching Functions , 1972, IEEE Transactions on Computers.
[18] M. Perkowski,et al. An exact algorithm to minimize mixed-radix exclusive sums of products for incompletely specified Boolean functions , 1990, IEEE International Symposium on Circuits and Systems.
[19] Chyan Yang,et al. Experiences of parallel processing with direct cover algorithms for multiple-valued logic minimization , 1992, [1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic.
[20] Hideo Fujiwara,et al. Logic Testing and Design for Testability , 1985 .
[21] Tsutomu Sasao,et al. Multiple-Valued Decomposition of Generalized Boolean Functions and the Complexity of Programmable Logic Arrays , 1981, IEEE Transactions on Computers.
[22] M. Perkowski,et al. Canonical restricted mixed-polarity exclusive-OR sums of products and the efficient algorithm for their minimisation , 1993 .