An Energy Ecient Recongurable Public-Key Cryptography Processor Architecture ?

The ever increasing demand for security in portable, energy- constrained environments that lack a coherent security architecture has resulted in the need to provide energy ecient hardware that is algo- rithm agile. We demonstrate the feasibility of utilizing domain-specic recongurable processing for asymmetric cryptographic applications in order to satisfy these constraints. An architecture is proposed that is capable of implementing a full suite of nite eld arithmetic over the integers modulo-N, binary Galois Fields, and non-supersingular elliptic curves over GF (2 n ), with operands ranging in size from 8 to 1024 bits. The performance and energy eciency of the architecture are estimated via simulation and compared to existing solutions (e.g., software and FPGA's), yielding approximately two orders of magnitude reduction in energy consumption at comparable levels of performance and flexibility.

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