Optimal Integrated VLIW Code Generation with Integer Linear Programming

We give an Integer Linear Programming (ILP) solution that fully integrates all steps of code generation, i.e. instruction selection, register allocation and instruction scheduling, on the basic block level for VLIW processors. In earlier work, we contributed a dynamic programming (DP) based method for optimal integrated code generation, implemented in our retargetable code generator OPTIMIST. In this paper we give first results to evaluate and compare our ILP formulation with our DP method on a VLIW processor. We also demonstrate how to precondition the ILP model by a heuristic relaxation of the DP method to improve ILP optimization time.

[1]  Daniel Kästner Retargetable postpass optimisation by integer linear programming , 2000 .

[2]  Christoph Kessler,et al.  Optimal integrated code generation for VLIW architectures: Research Articles , 2006 .

[3]  Rainer Leupers,et al.  Time-constrained code compaction for DSPs , 1997, IEEE Trans. Very Large Scale Integr. Syst..

[4]  Kent Wilken,et al.  Optimal instruction scheduling using integer programming , 2000, PLDI.

[5]  Gary William Grewal,et al.  An integrated approach to retargetable code generation , 1994, Proceedings of 7th International Symposium on High-Level Synthesis.

[6]  Steven S. Muchnick,et al.  Advanced Compiler Design and Implementation , 1997 .

[7]  Dilip K. Banerji,et al.  An Integrated and Accelerated ILP Solution for Scheduling, Module Allocation, and Binding in Datapath Synthesis , 1993, The Sixth International Conference on VLSI Design.

[8]  Andrzej Bednarski,et al.  Integrated Optimal Code Generation for Digital Signal Processors , 2006 .

[9]  Chung-Ta King,et al.  Using integer linear programming for instruction scheduling and register allocation in multi-issue processors , 1997 .

[10]  Mohamed I. Elmasry,et al.  Simultaneous scheduling and allocation for cost constrained optimal architectural synthesis , 1991, DAC '91.

[11]  Christopher W. Fraser,et al.  A Retargetable C Compiler: Design and Implementation , 1995 .

[12]  S. Winkel Optimal global instruction scheduling for the Itanium processor architecture , 2004 .

[13]  Christoph W. Kessler,et al.  Optimal integrated code generation for VLIW architectures , 2006, Concurr. Comput. Pract. Exp..