High-Performance Undoped-Body 8-nm-Thin SOI Field-Effect Transistors

We have fabricated undoped-body short-channel extremely thin silicon-on-insulator (ETSOI) field-effect transistors (FETs) with 8-nm SOI thickness that exhibit the expected short-channel benefit compared with doped partially depleted SOI (PDSOI) FETs. Using a source/drain extension (SDE) last process with the SDE implants activated with diffusionless laser anneal, we demonstrate that the series resistance penalty can be minimized, which leads to ETSOI FET drive currents that are comparable to those of conventional thick-body PDSOI FETs.

[1]  T. Numata,et al.  Experimental study on carrier transport mechanism in ultrathin-body SOI nand p-MOSFETs with SOI thickness less than 5 nm , 2002, Digest. International Electron Devices Meeting,.

[2]  J. Colinge.  Reduction of kink effect in thin-film SOI MOSFETs , 1988, IEEE Electron Device Letters.

[3]  D. Mocuta,et al.  High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

[4]  Stephan A. Cohen,et al.  Investigation of transient diffusion effects in rapid thermally processed ion implanted arsenic in silicon , 1985 .

[5]  S. Horiguchi,et al.  Quantum-mechanical effects on the threshold voltage of ultrathin-SOI nMOSFETs , 1993, IEEE Electron Device Letters.

[6]  Y. Tosaka,et al.  Scaling theory for double-gate SOI MOSFET's , 1993 .

[7]  K. K. Young.  Short-channel effect in fully depleted SOI MOSFETs , 1989 .

[8]  V. Trivedi,et al.  Nanoscale FD/SOI CMOS: thick or thin BOX? , 2005, IEEE Electron Device Letters.

[9]  V. Trivedi,et al.  Scaling fully depleted SOI CMOS , 2003 .

[10]  L. Black,et al.  Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths , 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

[11]  K. F. Lee,et al.  Scaling the Si MOSFET: from bulk to SOI to bulk , 1992 .

[12]  E.J. Nowak,et al.  The effective drive current in CMOS inverters , 2002, Digest. International Electron Devices Meeting,.

[13]  Arvind Kumar,et al.  Silicon CMOS devices beyond scaling , 2006, IBM J. Res. Dev..

[14]  G. Dewey,et al.  Tri-Gate Transistor Architecture with High-k Gate Dielectrics, Metal Gates and Strain Engineering , 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

[15]  H.-S.P. Wong,et al.  Fabrication of metal gated FinFETs through complete gate silicidation with Ni , 2004, IEEE Transactions on Electron Devices.