Flash-memories in Space Applications: Trends and Challenges

Nowadays space applications are provided with a processing power absolutely overcoming the one available just a few years ago. Typical mission-critical space system applications include also the issue of solid-state recorder(s). Flash-memories are nonvolatile, shock-resistant and power-economic, but in turn have different drawbacks. A solid-state recorder for space applications should satisfy many different constraints especially because of the issues related to radiations: proper countermeasures are needed, together with EDAC and testing techniques in order to improve the dependability of the whole system. Different and quite often contrasting dimensions need to be explored during the design of a flash-memory based solid- state recorder. In particular, we shall explore the most important flash-memory design dimensions and trade-offs to tackle during the design of flash-based hard disks for space applications

[1]  Jen-Chieh Yeh,et al.  RAMSES-FT: a fault simulator for flash memory testing and diagnostics , 2002, Proceedings 20th IEEE VLSI Test Symposium (VTS 2002).

[2]  R. Harboe-Sorensen,et al.  Heavy ion SEE studies on 4-Gbit NAND-Flash memories , 2007, 2007 9th European Conference on Radiation and Its Effects on Components and Systems.

[3]  Yu Xin,et al.  A Flexible Garbage Collect Algorithm for Flash Storage Management , 2008 .

[4]  Mendel Rosenblum,et al.  The design and implementation of a log-structured file system , 1991, SOSP '91.

[5]  Kewal K. Saluja,et al.  Fault Models and Test Procedures for Flash Memory Disturbances , 2001, J. Electron. Test..

[6]  Li-Pin Chang,et al.  On efficient wear leveling for large-scale flash-memory storage systems , 2007, SAC '07.

[7]  Paolo Bernardi,et al.  A P1500-compatible programmable BIST approach for the test of embedded flash memories , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[8]  ChiangMei-Ling,et al.  Using data clustering to improve cleaning performance for plash memory , 1999 .

[9]  Tei-Wei Kuo,et al.  An efficient management scheme for large-scale flash-memory storage systems , 2004, SAC '04.

[10]  Jen-Chieh Yeh,et al.  Flash Memory Testing and Built-In Self-Diagnosis With March-Like Test Algorithms , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[11]  Approved June,et al.  IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays , 1991 .

[12]  Jen-Chieh Yeh,et al.  On test and diagnostics of flash memories , 2004, 13th Asian Test Symposium.

[13]  R. Harboe-Sorensen,et al.  TID and SEE Tests of an Advanced 8 Gbit NAND-Flash Memory , 2008, 2008 IEEE Radiation Effects Data Workshop.

[14]  Kewal K. Saluja,et al.  Testing flash memories , 2000, VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design.

[15]  Wei-Lun Wang,et al.  An automatic design for flash memory testing , 2007, 2007 IEEE International Workshop on Memory Technology, Design and Testing.

[16]  Anthony Lai.  Space-ready, radiation- tolerant processor modules: A COTS technology strategy , 2005 .

[17]  Margo I. Seltzer,et al.  Heuristic Cleaning Algorithms in Log-Structured File Systems , 1995, USENIX.

[18]  Willy Zwaenepoel,et al.  eNVy: a NonVolatile main memory storage system , 1993, Proceedings of IEEE 4th Workshop on Workstation Operating Systems. WWOS-III.

[19]  Tei-Wei Kuo,et al.  Configurable Flash-Memory Management: Performance versus Overheads , 2008, IEEE Transactions on Computers.

[20]  Tei-Wei Kuo,et al.  Endurance Enhancement of Flash-Memory Storage, Systems: An Efficient Static Wear Leveling Design , 2007, 2007 44th ACM/IEEE Design Automation Conference.

[21]  Jing Chen,et al.  An active space recycling mechanism for flash storage systems in real-time application environment , 2005, 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'05).

[22]  Jen-Chieh Yeh,et al.  Diagonal test and diagnostic schemes for flash memories , 2002, Proceedings. International Test Conference.

[23]  Kewal K. Saluja,et al.  Flash memory disturbances: modeling and test , 2001, Proceedings 19th IEEE VLSI Test Symposium. VTS 2001.