A 1 / 3 . 4-inch 2 . 1-Mpixel 240-frames / s CMOS Image Sensor

This paper proposes a 240 frames/s 2.1 M-pixel CMOS image sensor with column-shared cyclic ADC that consumes low power of 90 μW/column at 1.5 V supply and is applicable to the fine pixel pitch of 2.25 μm. The prototype sensor was fabricated in a 0.13-μm 1P4M CMOS technology. The measured DNL and INL are +0.59/-0.83 LSB and +2.8/-3.6 LSB, respectively. The measured maximum pixel rate is 500 Mpixels/s with a low power of 300 mW.

[1]  M. Furuta,et al.  A High-Speed, High-Sensitivity Digital CMOS Image Sensor With a Global Shutter and 12-bit Column-Parallel Cyclic A/D Converters , 2007, IEEE Journal of Solid-State Circuits.

[2]  Shoji Kawahito,et al.  A CMOS Image Sensor Integrating Column-Parallel Cyclic ADCs with On-Chip Digital Error Correction Circuits , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[3]  I. Takayanagi,et al.  A 1.25-inch 60-frames/s 8.3-M-pixel digital-output CMOS image sensor , 2005, IEEE Journal of Solid-State Circuits.

[4]  Eric R. Fossum,et al.  A high-speed, 240-frames/s, 4.1-Mpixel CMOS sensor , 2003 .

[5]  S. Watanabe,et al.  A 1/1.8-inch 6.4MPixel 60 frames/s CMOS Image Sensor with Seamless Mode Change , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.