SAT solver management strategies in IC3: an experimental approach
暂无分享,去创建一个
[1] Masahiro Fujita,et al. Symbolic model checking using SAT procedures instead of BDDs , 1999, DAC '99.
[2] Hana Chockler,et al. Incremental formal verification of hardware , 2011, 2011 Formal Methods in Computer-Aided Design (FMCAD).
[3] Armin Biere,et al. Simulating Circuit-Level Simplifications on CNF , 2011, Journal of Automated Reasoning.
[4] Mary Sheeran,et al. Checking Safety Properties Using Induction and a SAT-Solver , 2000, FMCAD.
[5] Ofer Strichman,et al. Efficient MUS extraction with resolution , 2013, 2013 Formal Methods in Computer-Aided Design.
[6] David A. Plaisted,et al. A Structure-Preserving Clause Form Translation , 1986, J. Symb. Comput..
[7] Magnus Björk,et al. Successful SAT Encoding Techniques , 2009, J. Satisf. Boolean Model. Comput..
[8] Robert K. Brayton,et al. Efficient implementation of property directed reachability , 2011, 2011 Formal Methods in Computer-Aided Design (FMCAD).
[9] Sharad Malik,et al. Chaff: engineering an efficient SAT solver , 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).
[10] Aaron R. Bradley. Understanding IC3 , 2012, SAT.
[11] Alan Mishchenko,et al. Trading-off Incrementality and Dynamic Restart of Multiple Solvers in IC3 , 2013, DIFTS@FMCAD.
[12] Aaron R. Bradley,et al. SAT-Based Model Checking without Unrolling , 2011, VMCAI.
[13] Gianpiero Cabodi,et al. Benchmarking a model checker for algorithmic improvements and tuning for performance , 2011, Formal Methods Syst. Des..
[14] Alan Mishchenko,et al. Applying Logic Synthesis for Speeding Up SAT , 2007, SAT.
[15] Niklas Sörensson,et al. Temporal induction by incremental SAT solving , 2003, BMC@CAV.
[16] G. S. Tseitin. On the Complexity of Derivation in Propositional Calculus , 1983 .
[17] Zohar Manna,et al. Checking Safety by Inductive Generalization of Counterexamples to Induction , 2007, Formal Methods in Computer Aided Design (FMCAD'07).
[18] Orna Grumberg,et al. Lazy abstraction and SAT-based reachability in hardware model checking , 2012, 2012 Formal Methods in Computer-Aided Design (FMCAD).
[19] Fabio Somenzi,et al. Better generalization in IC3 , 2013, 2013 Formal Methods in Computer-Aided Design.
[20] Marco Roveri,et al. The nuXmv Symbolic Model Checker , 2014, CAV.
[21] Koen Claessen,et al. SAT-Based Verification without State Space Traversal , 2000, FMCAD.
[22] Fabio Somenzi,et al. CirCUs: A Hybrid Satisfiability Solver , 2004, SAT.
[23] Kenneth L. McMillan,et al. Interpolation and SAT-Based Model Checking , 2003, CAV.
[24] Marco Roveri,et al. Comparing Different Variants of the ic3 Algorithm for Hardware Model Checking , 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.